Addition is basic arithmetic
operation. Subtraction, multiplication operations can be performed with adders.

Half
adder:

Half adder adds two bits and
produces sum and carry.

The Boolean equations for half
adder are

Sum= A XOR B

Carry = A.B

Full
adder:

Full adder adds three bits and
produces sum and carry. Truth table for this is shown below.

Boolean equations for full adder
are

Sum=A XOR B XOR C

Carry= AB+BC+CA

Logic circuit for full adder is as
shown below.

Full adder can also be implemented
with two half adders. The first two bits can be added using a half adder. The
obtained sum and the other bit can be added in one more half adder. If any half
adder output produces a carry the output carry needs to asserted, hence ORing of
carry outputs of each half adder provides output carry. Below figure shows the
logic circuit.

Ripple
adder:

- Ripple adder can be used to add two n-bit binary numbers.
- It is a parallel adder.
- n- bit adder requires n full adders(if Carry in is required else n-1 full adders and a half adder)
- In this adder carry out of one full adder is given to carry in of next bit adder. Thus carry ripples from one full adder to other.

Drawback of this adder is delay is
more. Because the final sum settles only when carry in of MSB bits adder is
stable. Since it needs to propagate all from LSB to MSB takes long time.

Carry
Look Ahead adder:

In this adder carry is computed before
adding the numbers. Thus delay of this circuit is less. The drawback of ripple
adder is overcome by carry look ahead adder.

Consider the truth table of full
adder

From the truth it can be observed
that

- If A & B are different then Cin needs to be propagated to output (Propagate carry)
- If A & B both are 1’s then irrespective of Cin carry out is generated (Generate carry)

Boolean equations for implementing
this adder are

Propagate P

_{i}=A_{i}XOR B_{i}
Generate G

_{i}=A_{i}.B_{i}
Sum S

_{i}=P_{i}XOR C_{i-1}
In general C

_{i}=G_{i}+C_{i-1}P_{i}
For 4-bit carry look ahead adder

Let C

_{0}=C_{in}
C

_{1}=G_{1}+C_{0}P_{1}
C

_{2}=G_{2}+C_{1}P_{2}=G_{2}+P_{2}(G_{1}+C_{0}P_{1})
C

_{3}=G_{3}+C_{2}P_{3}=G_{3}+P_{3}G_{2}+P_{3}P_{2}G_{1}+P_{3}P_{2}P_{1}C_{0}
Below figure shows the logic
diagram of 4-bit carry look ahead adder.

As the no. of bits to be added
increases, the no. of inputs to carry producing AND gate increases, thereby increasing
delay.

BCD adder:

Valid BCD numbers are from 0-9. To
represent each BCD digit 4 bits are required.

When two BCD numbers are added the
result may exceed 9. In such a case correction needs to be applied to get back
the valid BCD digits in the result. If the result exceeds 9, then add 6(0110)
to the result to convert it into a valid BCD number. Below figure shows the BCD
adder logic diagram.

First 4-bit binary adder adds two
4-bit binary numbers A0-A3 and B0-B3 and Produces sum Z8Z4Z2Z0. If sum exceeds ‘9’
(if sum exceeds 9, then 1100,1101,1110,1111 have Z8, Z4 1’s and 1010, 1011 has
Z8, Z2 1’s and Cout may be 1 some times. Thus this condition is detected by
Z8Z4+Z8Z2+Cout function), then 0110 is added to the result in second 4-bit
binary adder. If the result doesn’t exceed 9, second adder gets 0000 as input
thus the same sum output of previous adder passes to output. Thus the result is
always a valid BCD number.

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