Wednesday, 21 March 2012

8085 Architecture

below figure shows the architecture of 8085 microprocessor.

The following are the different blocks in the 8085 processor.
 it is 8-bit ALU. It can perform arithmetic and logical operations on 8-bit data. If an operation needs to be performed on 16-bit data, it needs to be broken into two 8-bit parts and each 8-bit operation should be performed on each 8-bit data.  It takes operand inputs from accumulator and a temporary register.  Result of the operation is stored in accumulator. Depending on the result of operation, flags in flag register values will be changed.     
Flag register:
As already explained contents of flag register will be changed according to the result of ALU operation. Below figure shows the flag register format of 8085.
Sign flag (S): when the result of ALU operation is negative sign flag is set. If the result is positive, then sign flag is reset. i. e. the D7 bit of accumulator is copied into the sign flag, as D7 anyhow contains sign.
Zero flag (Z): when the result of ALU operation is zero, Zero flag is set. If the result is non-zero then flag is reset.
Auxiliary carry (AC): If an ALU operation results in carry from lower nibble to upper nibble (or) bit D3 to bit D4, Auxiliary flag is set. Else it is reset. This flag is used in BCD arithmetic.
Parity flag (P): If the result contains even number of ones, the flag is set else it is reset. So the parity flag is odd parity bit.
Carry flag (CY): If the arithmetic operation results in carry, CY flag is set, else it is reset.
Timing and Control unit:
This is responsible for generation of control signals, such as RD’, WR’ to interface peripherals. It also synchronizes all microprocessor operations.
Instruction Register and Decoding:
Instruction register holds instruction that is fetched from memory. Instruction decoder decodes the opcode (which is part of fetched instruction present in instruction register). Instruction register is not accessible to the programmer.
Register Array:
8085 has six general purpose registers B, C, D, E, H, L. They can be used as pairs to hold 16-bit data as BC, DE, HL. Accumulator is 8-bit register which holds the results of operations as well as operand on which some operation needs to be performed. Flag register contains five flags, namely S, Z, CY, AC, P flags. 8085 has two 16- bit register PC, SP. PC always consists of address of next instruction to be executed. SP always points to top of stack. i.e. address of top memory location of stack. Stack is a data structure. It is used to store return addresses whenever call to subprograms or an interrupt occurs. Two temporary registers W, Z are also present. These are used to hold temporary results during execution. But these are not accessible to the user. Incrementer and decrementer address latch is for incrementing the PC content for every fetch cycle.
Interrupt Controller:
 8085 has 5 external interrupts. TRAP, INTR, RST 5.5, RST 6.5, and RST 7.5. Whenever processor gets interrupt it finishes current instruction execution and issues INTA (interrupt acknowledge) signal to the peripheral which raised the interrupt and goes to execute interrupt service routine. Interrupt controller controls the interrupts.   
Serial I/O control:
Serial data can be sent out using SOD pin and serial data can be read from SID pin. It controls serial IO related operations.  

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  1. Thankyou for this wondrous post, I am glad I observed this website on yahoo. Sign Companies Minnesota

  2. Very good effort. Happy to see the architecture in a colorful picture.
    However, representation of active low signals (RD, WR, RST 5.5, etc) need to be appropriately mentioned.